Microcontroller multi-core Architecture: A real world device solving real world problems

Kratak sadržaj predavanja

Over the past several years multi-core topologies have been introduced into main stream products. To date these products have been addressing three broad categories: improved CPU performance by spreading the work load over multiple cores versus just increasing frequency, improved reliability using symmetric lock stepped cores, and specialized DSP’s functions with a control processor.

This talk introduces a new dual core asymmetric topology from NXP based on Cortex M4 and Cortex M0. The hardware implementation details will be reviewed showing the benefits of the topology along with performance benefits using real world applications. In addition, there will be a detailed discussion showing how the two processors work together using an inter-processor communication protocol as well as how to optimize the system application using the resources available. There will also be detailed review of the debugging tools and strategy for this dual core implementation.

Biografija predavača

Rob Cosaro is the manager of the Systems and Architecture group for the microcontroller product line at NXP Semiconductors. In this role, he is responsible for the system software architectures of current and future microcontroller products as well as application solutions. Rob brings more than 20 years of experience to his role at NXP. In his time at NXP/Philips, Rob contributed to the designs of the MX, LPC900 and LPC2000 families of microcontrollers. Rob has a broad background and has designed everything from analog products such as high voltage power supplies and solar array regulators to complex ASICs for the telecom industry. Rob holds a Bachelor of Science degree in electrical engineering from the University of Illinois.